Multi layer modules are used for the packaging of electronic components, especially integrated circuit chips. Both single chip modules (SCM) and multi chip modules (MCM) are widely used. The most common type of such modules is the multi-layer ceramic packaging module. In this type of module the layers typically are of a ceramic or glass ceramic material. However, other types of thick film technologies are known, such as glass, epoxy or Teflon.
Present day modules made of ceramic, typically multi-layered ceramic modules, are normally mounted onto cards or boards to form the central processing unit (CPU) of a computer. The multi-layer ceramic (MLC) modules typically have chips mounted on the top surface.
As integrated circuit speeds and packaging densities increase, the importance of the packaging technology becomes increasingly significant. For example, as devices approach gigahertz speed, inductance effects may arise from switching, and are particularly problematic in voltage and ground leads.
A standard technology in the above-mentioned state of the art will be explained below. In order to resolve the above-mentioned problems of the conventional multi-layer modules, for example, European Unexamined Patent Publication EP 1 298 972 A2 discloses a multi-layer wiring circuit board capable of conducting high frequency switching operation on the circuit while suppressing the generation of high frequency noise by reducing the inductance of the circuit. The multi-layer wiring circuit board comprises: an uppermost layer designated as a first layer on which parts are mounted; a second layer on which one of a ground layer and an electric power source layer is arranged; a third layer on which the other is arranged; and an insulating layer arranged between the ground layer and the electric power source layer. A resin layer having a thermoplastic adhesion property on both faces is used as material of the insulating layer arranged between the electric power source layer and the ground layer.
On the uppermost surface of the multi-layer wiring circuit board, it is possible to mount any of the chips with the technology of a ball grid array having solder bumps. The electrode pads of the semiconductor chips are connected with the conductor pads on the multi-layer wiring circuit board through the solder bumps.
Another multi-layer circuit substrate having orthogonal grid ground and voltage plane is disclosed in U.S. Pat. No. 6,184,477. The multi-layer circuit substrate is designed to ensure uniform impedance characteristics for signal conductors even when such conductors are installed at a high density. The device consists of a plurality of planar insulating layers laminated together. The patent discloses a first insulating layer bears a first ground plane formed as an orthogonal grid. A second insulating layer, laminated to the first layer, bears a first set of signal wiring, the traces of which are disposed parallel to one of the orthogonal axes of the ground plane. A third insulating layer, laminated to the second layer, bears either a second ground plane formed as an orthogonal grid or a voltage plane formed as an orthogonal grid. A fourth insulating layer, laminated to the third layer, bears a second set of signal wiring, the traces of which are disposed parallel to the other orthogonal axis of the first ground plane. The first and second sets of signal wiring are in electrical communication by means of conductors normal to the surface of the device. A fifth insulating layer, laminated to the fourth layer, bears either a second or third ground plane formed as an orthogonal grid.
The reduction of mid-frequency power noise is of increasing importance for future microprocessors and computer systems.
Accordingly, there is a need for a semiconductor device structure with improved power noise characteristics.